Chip-Level STA Engineer — Shape Next-Gen Silicon Timing (Armenia)

Chip-Level STA Engineer — Shape Next-Gen Silicon Timing (Armenia)

28 may
|
Cisco Systems
|
Armenia

28 may

Cisco Systems

Armenia

Cisco Systems, Inc. in Armenia, Colombia, is seeking an experienced engineer for their ASIC Physical Design Team. The role involves driving high-performance timing closure and rigorous sign-off for next-generation chips. Candidates should have at least three years of experience in ASIC design and verification with a strong understanding of the full design cycle. This position offers an opportunity to work in a collaborative environment that values innovation and mentorship, contributing to Cisco's silicon innovations and ensuring solutions meet performance targets.

📌 Chip-Level STA Engineer — Shape Next-Gen Silicon Timing (Armenia)
🏢 Cisco Systems
📍 Armenia

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