Senior ASIC Layout Engineer – Lead High-Performance Cells (Bogotá)

Senior ASIC Layout Engineer – Lead High-Performance Cells (Bogotá)

30 oct
|
Cisco Systems
|
Bogotá

30 oct

Cisco Systems

Bogotá

Cisco Systems, Inc. is hiring an ASIC Engineer to own standard cell layout for next-generation ASICs on advanced FinFET/GAA nodes. You will design and verify high-performance cells, drive physical verification to clean signoff, and manage library quality from GDS to release.

You will collaborate with circuit, physical design and foundry teams, and mentor engineers as the senior technical owner. You will lead layout architecture, own complex cell design, develop automation, and contribute to

📌 Senior ASIC Layout Engineer – Lead High-Performance Cells (Bogotá)
🏢 Cisco Systems
📍 Bogotá

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