Next-Gen ASIC Layout Engineer (FinFET/3nm) (Quindío)

Next-Gen ASIC Layout Engineer (FinFET/3nm) (Quindío)

04 nov
|
Cisco Systems
|
Quindío

04 nov

Cisco Systems

Quindío

Cisco Systems, Inc in Colombia is seeking an ASIC Engineer to design and verify standard cells for next-generation ASICs on FinFET and GAA nodes. You will build high-performance cell layouts, take them to clean physical verification, and run library QA checks before release.

You will collaborate with circuit design, characterization, and physical design teams. This role offers broad hands-on exposure and a clear path to technical ownership.

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📌 Next-Gen ASIC Layout Engineer (FinFET/3nm) (Quindío)
🏢 Cisco Systems
📍 Quindío

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