Memory Layout Engineer - Sram & Physical Design Expert (Meta)

Memory Layout Engineer - Sram & Physical Design Expert (Meta)

10 nov
|
Cisco Systems
|
Meta

10 nov

Cisco Systems

Meta

Cisco Systems, Inc. is seeking a senior-level physical design engineer for a hybrid role in Yerevan.
You will implement SRAM layout and collaborate with international circuit teams to translate schematics into robust physical designs for critical silicon components.
The role requires 5+ years in physical design, experience with Cadence or Synopsys, and familiarity with nodes from 22nm down to 2nm.
You will ensure DRC cleanliness and support tapeouts in a fast-paced, integral team environment.
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📌 Memory Layout Engineer - Sram & Physical Design Expert (Meta)
🏢 Cisco Systems
📍 Meta

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